For mounting a large scale semiconductor integrated circuit (called “LSI” hereinafter), various types of thin-film multi-layer wiring boards are used as a LSI loaded wiring board. In a probe card for inspecting electrical properties of all of the LSIs on a wafer collectively, multi-layer wiring boards are also used due to the necessity of arranging probes in a pitch corresponding to that of the terminals in the LSIs.
In these multi-layer wiring boards, adjustment of characteristic impedance of transmission lines is carried out in order to avoid disorder of wave form, delay, and deterioration of transmission signals caused by impedance mismatching. For example, Patent Literatures 1 and 2 disclose technique for reducing characteristic impedance mismatching between a via and a wire in a wiring layer by controlling characteristic impedance of a via or a pair of vias which connect wiring layers in a multi-layer wiring board. However, Patent Literatures 1 and 2, while they disclose technique for adjusting characteristic impedance of a via or a pair of vias in a multi-layer wiring board, give no suggestions about adjustment of characteristic impedance of a wire formed in a wiring layer of a multi-layer wiring board.
On the other hand, Patent Literature 3 discloses technique for adjusting characteristic impedance of a wire by placing an earthing conductive part in parallel to a wire in a probe card so as to form microstrip line and by changing the width of the wire and the thickness of the insulating layer. However, there is nothing in Patent Literature 3 that refers to either the adjustment of characteristic impedance of a wire in multi-layer wiring board, or adaptation to the narrow-pitch tendency of the terminals in LSI or the like. Further, according to the inventors' confirmation, as described below, it is difficult to apply the technique disclosed in Patent Literature 3 directly to a multi-layer wiring board used in a probe card or the like which is adapted to the narrow-pitch tendency of terminals.
At present, there is a continued demand for pursuing higher density in connection with LSI, etc. In consequence, a wiring pitch of 50 μm or less is desired. On the other hand, it is required for a wire to have an electric current capacity of about 1 A (ampere). Further, it is needed for a wire to have characteristic impedance Z0 of 50Ω (ohm). In order to satisfy all of these requirements, it is necessary to use a copper (Cu) wire having a width of 25 μm, a thickness of about 10 μm, and a wiring pitch of 25 μm, and such wire requires the insulating layer inserted between the wiring layers to have a thickness of about 20 μm. When an insulating layer having a thickness of 20 μm is formed by using a conventional polyimide as an insulating material, a copper wire having a width of 25 μm and a thickness of 10 μm is formed on the front surface of the insulating layer, and a solid pattern ground layer is formed on the back surface of the insulating layer to compose a microstrip line as shown in FIG. 5, the characteristic impedance Z0 is calculated approximately using the below described Formula (1). In FIG. 5, the reference numeral 101 indicates a wire, 102 indicates an insulating layer, 103 indicates a solid pattern ground layer, the reference symbol H indicates the thickness of the insulating layer, W indicates the width of the wire, and T indicates the thickness of the wire.
                              Z          0                =                              87                                                            ɛ                  r                                +                1.41                                              ×                      ln            ⁡                          [                                                5.98                  ×                  H                                                                      0.8                    ×                    W                                    +                  T                                            ]                                                          Formula        ⁢                                  ⁢                  (          1          )                    
In Formula (1), Z0, H, W and T represent characteristic impedance, thickness of the insulating layer, width of the wire and thickness of the wire, respectively, as mentioned above. ∈r represents relative dielectric constant of the insulating layer. When H=20 μm, W=25 μm, T=10 μm and ∈r=3.7 are substituted into Formula (1), the characteristic impedance Z0 of the wire is calculated as Z0=53.1 (Ω), which is almost close to the required characteristic impedance of 50 ohm (Ω).
In a multi-layer wiring layer, however, a wire locates in an inner layer surrounded by insulating layers and a solid pattern ground layer exists in both upper and lower sides of the wire. Thus, a strip line as shown in FIG. 6, for example, is formed (In FIG. 6, the same symbols as in FIG. 5 indicate the same materials or parts as in FIG. 5). The characteristic impedance Z0 of the strip line as shown in FIG. 6 can be calculated approximately using the following Formula (2).
                              Z          0                =                              60                                          ɛ                r                                              ×                      ln            ⁡                          [                                                1.9                  ×                                      (                                                                  2                        ×                        H                                            +                      T                                        )                                                                                        0.8                    ×                    W                                    +                  T                                            ]                                                          Formula        ⁢                                  ⁢                  (          2          )                    
In Formula (2), Z0 represents characteristic impedance, H represents thickness of upper and lower insulating layers, W represents width of a wire, T represents thickness of a wire and ∈r represents relative dielectric constant of the insulating layer. When H=20 μm, W=25 μm, T=10 μm and ∈r=3.7 are substituted into Formula (2), the characteristic impedance Z0 of the wire is calculated as Z0=36.0 (Ω), which is much lower than the required characteristic impedance of 50 ohm (Ω). Consequently, in a multi-layer wiring board adapted to narrow-pitch tendency of the terminals, it is difficult to adjust the characteristic impedance of a wire to around 50 ohm by simply applying the technique disclosed in Patent Literature 3.